Interfaces and integrated circuits

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Recent innovations in multimedia SoC's (System-on-chip) have been based on decreasing the physical form factor to reduce costs. The most efficient method of miniaturization is to decrease the pin count and utilize the serial interfaces such as SPI and USB, allowing the use of SPI flash and USB-LAN solutions, in favor of a parallel local/memory bus. Furthermore, USB's plug-and-play and 4-pin serial interface provides transfer speeds up to 480 Mbps, making it an ideal solution for miniature and portable handheld devices to quickly connect to networking peripherals. ASIX Electronics has released the AX88x72 series USB-to-LAN chips to satisfy the increasing market demands for adding networking capability for latest multimedia SoC's. The AX88772A features a USB interface to communicate with a USB Host Controller and is compliant with USB specification V1.1 and V2.0. The AX88772A implements 10/100Mbps Ethernet LAN function based on IEEE802.3 and IEEE802.3u standards with 24KB of embedded SRAM for packet buffering. In addition, it integrates an on-chip 10/100Mbps Ethernet PHY, simplifying system design. The AX88x72A has a wide array of features including support for HP Auto-MDIX, Wake-on-LAN power management, and IEEE 802.3x/backpressure flow control. Optional serial interfaces such as I²C, SPI, and UART are provided as a control channel from the USB Host Controller to communicate with the external MCU chip. The AX88772A, low-pin-count (64-pin LQFP) USB 2.0 to 10/100M Fast Ethernet controller, is a high performance and highly integrated ASIC which enables a low cost, small form factor, and simple plug-and-play Fast Ethernet network connection capability for desktops, notebook PC's, UMPC's, cradles/port replicators/docking stations, game consoles, digital-home appliances, and any embedded system using a standard USB port. USB Device Interface Integrates on-chip USB 2.0 transceiver and SIE compliant to USB Spec 1.1 and 2.0 Supports USB Full and High Speed modes with Bus-Power or Self-Power capability Supports 4 or 6 programmable endpoints on USB interface High performance packet transfer rate over USB bus using proprietary burst transfer mechanism (US Patent Approval) Supports USB to Ethernet bridging or vice versa in hardware Fast Ethernet Controller Integrates 10/100Mbps Fast Ethernet MAC/PHY IEEE 802.3 10BASE-T/100BASE-TX compatible Supports twisted pair crossover detection and auto-correction (HP Auto-MDIX) Embedded 16KB SRAM for RX packet buffering and 8KB SRAM for TX packet buffering Supports both Full-duplex with flow control and Half-duplex with backpressure operation Supports 2 VLAN ID filtering, received VLAN Tag (4 bytes) can be stripped off or preserved MAC/PHY loop-back diagnostic capability Support Wake-on-LAN Function Supports Suspend mode and Remote Wakeup via Link-up, Magic packet, MS wakeup frame and external pin Optional PHY power down during Suspend mode Supports 256/512 bytes (93c56/93c66) of serial EEPROM (for storing USB Descriptors) Supports automatic loading of Ethernet ID, USB Descriptors and Adapter Configuration from EEPROM after power-on initialization Provides optional serial interface, I²C, SPI and UART Integrates on-chip voltage regulator and only requires a single 3.3V power supply 12MHz and 25Mhz clock input from either crystal or oscillator source Integrates on-chip power-on reset circuit Small form factor with 64-pin LQFP Operating temperature range: 0°C to 70°C

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